Publications

publications by categories in reversed chronological order. generated by jekyll-scholar.

2026

  1. ISSCC
    A 0.24 mJ/Frame Quadratic Interpolation 4DGS Processor with Recursive Computation Reuse and Tree-Based Parallel-Rendering
    Xiaolong Yang, Yang Wang, Wende Xu, and 8 more authors
    In IEEE International Solid-State Circuits Conference (ISSCC), 2026
  2. ASP-DAC
    MoBiLE: Efficient Mixture-of-Experts Inference on Consumer GPU with Mixture of Big Little Experts
    Yushu Zhao, Yubin Qin, Yang Wang, and 5 more authors
    In Asia and South Pacific Design Automation Conference (ASP-DAC), 2026
  3. TCAS-I
    An Energy-Efficient Transformer Fine-Tuning Processor for Personalized Edge Applications
    Xiaolong Yang, Yang Wang, Yubin Qin, and 7 more authors
    IEEE Transactions on Circuits and Systems I: Regular Papers, 2026

2025

  1. JSSC
    A 77.35 TOPS/W Transformer Processor Exploiting Multi-Scope Similarity in Attention Computing
    Yang Wang, Yubin Qin, Dazheng Deng, and 8 more authors
    IEEE Journal of Solid-State Circuits, 2025
  2. A-SSCC
    A 22nm 38.9 TFLOPS/W Computing-on-BENES-Network LLM Processor with Redundant Weight-bits Elimination and Key-Value Computing Reformulation
    Yang Wang, Huanyu Wang, Xiaolong Yang, and 8 more authors
    In IEEE Asian Solid-State Circuits Conference (A-SSCC), 2025
  3. arXiv
    From Quarter to All: Accelerating Speculative LLM Decoding via Floating-Point Exponent Remapping and Parameter Sharing
    Yushu Zhao, Yubin Qin, Yang Wang, and 5 more authors
    2025
  4. ISSCC
    An 88.36 TOPS/W Bit-Level-Weight-Compressed Large-Language-Model Accelerator with Cluster-Aligned INT-FP-GEMM and Bi-Dimensional Workflow Reformulation
    Yubin Qin, Yang Wang, Jiachen Wang, and 5 more authors
    In IEEE International Solid-State Circuits Conference (ISSCC), 2025
  5. TCAS-II
    BeaCIM: A Digital Compute-in-Memory DNN Processor With Bi-Directional Exponent Alignment for FP8 Training
    Yang Zhou, Yang Wang, Wenxin Yin, and 6 more authors
    IEEE Transactions on Circuits and Systems II: Express Briefs, 2025
  6. JSSC
    An Energy-Efficient Posit Compute-in-Memory Macro for High-Accuracy AI Applications
    Yang Wang, Xiaolong Yang, Yubin Qin, and 7 more authors
    IEEE Journal of Solid-State Circuits, 2025
  7. Electron. Lett.
    BLADE: Energy-Efficient Attention Accelerator with Fused Kernel and Bit-Level Redundancy Elimination
    Zhiwei Lin, Yubin Qin, Jiachen Wang, and 7 more authors
    Electronics Letters, 2025

2024

  1. A-SSCC
    A 28nm 118.26 TOPS/W Multi-Dimensional Fault-Tolerant AI Processor Enabling Voltage-Frequency Scaling Below Point-of-First-Failure
    Yang Wang, Xiaolong Yang, Yubin Qin, and 6 more authors
    In IEEE Asian Solid-State Circuits Conference (A-SSCC), 2024
  2. MICRO
    SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling
    Huizheng Wang, Jiahao Fang, Xinru Tang, and 9 more authors
    In IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024
  3. ISCA
    Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture
    Zhiheng Yue, Huizheng Wang, Jiahao Fang, and 12 more authors
    In ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), 2024
  4. ISCA
    MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition
    Yubin Qin, Yang Wang, Zhiren Zhao, and 5 more authors
    In ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), 2024
  5. DAC
    FQP: A Fibonacci Quantization Processor with Multiplication-Free Computing and Topological-Order Routing
    Xiaolong Yang, Yang Wang, Yubin Qin, and 4 more authors
    In ACM/IEEE Design Automation Conference (DAC), 2024
  6. VLSI
    A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication
    Yubin Qin, Yang Wang, Xiaolong Yang, and 4 more authors
    In IEEE Symposium on VLSI Technology and Circuits, 2024
  7. VLSI
    A 22nm 54.94 TFLOPS/W Transformer Fine-Tuning Processor with Exponent-Stationary Re-Computing, Aggressive Linear Fitting, and Logarithmic Domain Multiplicating
    Yang Wang, Xiaolong Yang, Yubin Qin, and 7 more authors
    In IEEE Symposium on VLSI Technology and Circuits, 2024
  8. JSSC
    Ayaka: A Versatile Transformer Accelerator with Low-Rank Estimation and Heterogeneous Dataflow
    Yubin Qin, Yang Wang, Dazheng Deng, and 10 more authors
    IEEE Journal of Solid-State Circuits, 2024
  9. ISSCC
    A 28nm 74.34 TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models
    Ruiqi Guo, Lei Wang, Xiaofeng Chen, and 9 more authors
    In IEEE International Solid-State Circuits Conference (ISSCC), 2024
  10. ISSCC
    A 28nm 83.23 TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications
    Yang Wang, Xiaolong Yang, Yubin Qin, and 7 more authors
    In IEEE International Solid-State Circuits Conference (ISSCC), 2024

2023

  1. JSSC
    An Energy-Efficient Transformer Processor Exploiting Dynamic Weak Relevances in Global Attention
    Yang Wang, Yubin Qin, Dazheng Deng, and 8 more authors
    IEEE Journal of Solid-State Circuits, 2023
  2. A-SSCC
    A 28nm 49.7 TOPS/W Sparse Transformer Processor with Random-Projection-Based Speculation, Multi-Stationary Dataflow, and Redundant Partial Product Elimination
    Yubin Qin, Yang Wang, Dazheng Deng, and 10 more authors
    In IEEE Asian Solid-State Circuits Conference (A-SSCC), 2023
  3. ISCA
    FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction
    Yubin Qin, Yang Wang, Dazheng Deng, and 6 more authors
    In ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), 2023
  4. VLSI
    A 28nm 77.35 TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing
    Yang Wang, Yubin Qin, Dazheng Deng, and 8 more authors
    In IEEE Symposium on VLSI Technology and Circuits, 2023

2022

  1. JSSC
    Trainer: An Energy-Efficient Edge-Device Training Processor Supporting Dynamic Weight Pruning
    Yang Wang, Yubin Qin, Dazheng Deng, and 6 more authors
    IEEE Journal of Solid-State Circuits, 2022
  2. TCAS-I
    BR-CIM: An Efficient Binary Representation Computation-In-Memory Design
    Zhiheng Yue, Yabing Wang, Yubin Qin, and 3 more authors
    IEEE Transactions on Circuits and Systems I: Regular Papers, 2022
  3. TCAS-I
    SWPU: A 126.04 TFLOPS/W Edge-Device Sparse DNN Training Processor with Dynamic Sub-Structured Weight Pruning
    Yang Wang, Yubin Qin, Leibo Liu, and 2 more authors
    IEEE Transactions on Circuits and Systems I: Regular Papers, 2022
  4. ISSCC
    A 28nm 27.5 TOPS/W Approximate-Computing-Based Transformer Processor with Asymptotic Sparsity Speculating and Out-of-Order Computing
    Yang Wang, Yubin Qin, Dazheng Deng, and 8 more authors
    In IEEE International Solid-State Circuits Conference (ISSCC), 2022

2021

  1. VLSI
    A 28nm 276.55 TFLOPS/W Sparse Deep-Neural-Network Training Processor with Implicit Redundancy Speculation and Batch Normalization Reformulation
    Yang Wang, Yubin Qin, Dazheng Deng, and 6 more authors
    In Symposium on VLSI Circuits, 2021
  2. AICAS
    HPPU: An Energy-Efficient Sparse DNN Training Processor with Hybrid Weight Pruning
    Yang Wang, Yubin Qin, Leibo Liu, and 2 more authors
    In IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2021